Intel's next Xeon goes all-in on chiplets — 256 cores on 22 tiles

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Intel's next Xeon goes all-in on chiplets — 256 cores on 22 tiles

Also today: London's robotaxi rules are stuck in traffic, and most Americans admit they can't read the statistics that AI-generated research throws at them.


Intel has laid out the full anatomy of Xeon 7, its Diamond Rapids server chip, at Hot Chips this week — and the headline is 256 performance cores assembled from up to 22 chiplets, 16 of them compute dies built on the bleeding-edge 18A-P process. The flagship pairs those core dies with four L3-packed base tiles and two "scalable fabric hub" dies that carry 16 channels of DDR5 and 128 lanes of PCIe 6.0 — a gigabyte-plus of cache and memory bandwidth that doubles last generation. It's Intel's most aggressive claim yet that it has finally cracked the modular, AMD-style playbook after three generations of trying, and the timing matters: AMD's rival Venice EPYC also tops out at 256 cores, so for the first time in years the top of the server market is a genuine spec-for-spec fight instead of a walkover.

The catch is what got left on the cutting room floor. Diamond Rapids ships without hyperthreading, only comes in high-core-count HPC flavors (the cheaper eight-channel variants were cancelled), and slipped to 2027 — meaning AMD's Zen 6 parts will have the market to themselves for a while first. The Register notes Intel's one real edge may be FP8 support in its AMX matrix instructions, which turns a plain CPU into a credible inference engine without a GPU alongside.

What makes this an AI story rather than a chip-nerd footnote: the data-center CPU is being repositioned as cheap, dense infrastructure for agentic workloads — running the sandboxes where AI-generated code executes, feeding retrieval databases, handling the unglamorous token-shuffling around GPU clusters. Intel is effectively betting that the AI buildout needs a commodity CPU layer too, and that whoever serves it cheapest wins volume even if Nvidia's Vera takes the glamorous head-node slot.

We covered the open-source side of this shift earlier — Qwen3.8-27B ships a fully NVFP4 build that keeps its benchmark scores at a third of the size — and FP8-on-CPU pushes the same direction: AI efficiency moving down the stack into hardware you already own.

London's robotaxi launch has quietly slipped, with Transport for London still yet to publish the guidance prospective operators need — and sources tell the Financial Times that operators now play down any chance of starting this year. The delay has frustrated companies lining up to run driverless services in the city, and it leaves the UK ceding ground while Waymo expands in the US, Munich, and beyond.

Separately, a Penn State-led study in PLOS One found 62% of US adults say they know little or nothing about basic statistics, while only 11% use stats regularly in daily life. Nine in ten say they'd lean on statistics more if they understood them better. That gap lands differently in an AI-saturated feed: model benchmarks, error bars, and p-values arrive faster than ever, and the literacy needed to question them hasn't kept pace. The study is about people, not models — but it explains why benchmark claims travel so far before anyone checks them.

What to watch: whether Intel shares clocks, IPC, and pricing for Xeon 7 later this year — the spec sheet looks competitive, but Venice wins on availability until 2027 arrives.

If a 256-core CPU with no hyperthreading is pitched as the budget workhorse for agentic AI, does that make the data-center CPU exciting again — or just evidence the GPU boom has nowhere left to spread? Tell us in the comments.

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